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#1 2010-02-12 23:47:34

haveaniceday
Member
Registered: 2010-02-12
Posts: 2

cable layout jtagicemk2klon/usbprogAVR32 ?

Hi,

I like work a little with usbprog  and with the EVK1104 evaluation board. ( AT32UC3A3256 )
I wonder why usbprog jtagicemk2klon and usbprogAVR32 require different cables to an AVR JTAG connector.
Does this make sense or is this just grown historically?
Is there any place for a general description which pins should be connected ?
I know usbprogAVR32 does not support the flash devices.

My last low level hardware tries are "ages" ago.
Should it be possible to do some debug with jtagicemk2klon and EVK1104?
Where should I connect JP2-2 to ?

Can somebody confirm this cabling for jtagicemk2klon <=> JTAG10PIN ?
usbprog           JTAG10PIN
           1  <=> 3 (TDO)
           2  <=> 4 (VTref) JP2 -2 with ??
           3  <=>     
           4  <=> 5 (TMS)
           5  <=>
           6  <=>
           7  <=> 1 (TCK)
           8  <=> 6 (RST)
           9  <=> 9 (TDI)
         10  <=> 2/10 (GND)
         NC <=> 8 NC
         NC <=> 7  (EVTO, Event output, not used)

The cabling USBprogAVR32 to Grasshopper is described here:
http://forum.embedded-projects.net/viewtopic.php?id=175

Have a nice day,

Christian

jtagicemk2klon: trunk/jtagicemk2klon/JTAGICE_MKII_clon/global.h

#define JTAG_TCK        PB7
#define JTAG_TDO        PB5
#define JTAG_TDI        PB6
#define JTAG_TMS        PB3
#define JTAG_RST        PB2

usbprogAVR32: trunk/usbprogAVR32/src/jtag_bus.h

#define JTAG_TDI        (1<<PB5)        // SV2-1, IC1-1,  output
#define JTAG_VT                         // SV2-2, JP2-2,  *must be connected to JP2-1 or JP2-3*
#define JTAG_NSRST      (1<<PB4)        // SV2-3, IC1-44, output
#define JTAG_NTRST      (1<<PB3)        // SV2-4, IC1-43, output
#define JTAG_TMS        (1<<PB0)        // SV2-5, IC1-40, output
#define JTAG_GPIO0      (1<<PB1)        // SV2-6, IC1-41,
#define JTAG_TCK        (1<<PB7)        // SV2-7, IC1-3,  output
#define JTAG_GPIO1      (1<<PB2)        // SV2-8, IC1-42,
#define JTAG_TDO        (1<<PB6)        // SV2-9, IC1-2,  input
#define JTAG_GND                        // SV2-10, GND

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#2 2010-02-14 11:03:50

haveaniceday
Member
Registered: 2010-02-12
Posts: 2

Re: cable layout jtagicemk2klon/usbprogAVR32 ?

Hi,
so I have read a few pages within the web.... There is an ISP interface and a JTAG interface.
USBprog works with 5V at the ISP interface. JTAG on EVK1104 is connected to VCC3 ( 3.3V)

http://support.atmel.no/knowledgebase/a … g_ext.html

I think my first question was nonsense about two different interfaces...

A more general question: is it possible to use usbprog with/without level shifter to debug a AVR32?

Christian

PS: I would also be happy with answers like "please learn some more before you are asking more unqualified question". smile

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